kernel/arch/riscv64/
registers.rs

1//! RISC-V 64-bit register module.
2//!
3//! This module provides the register file for the RISC-V 64-bit architecture.
4//! The register file is responsible for storing the general-purpose registers
5//! of the CPU.
6
7#[repr(C)]
8#[derive(Debug, Clone, Copy, PartialEq)]
9pub struct IntRegisters {
10    pub reg: [usize; 32],
11}
12
13impl IntRegisters {
14    pub const fn new() -> Self {
15        IntRegisters { reg: [0; 32] }
16    }
17
18    pub fn get_return_value(&self) -> usize {
19        // RISC-V syscall return value: a0 (x10)
20        self.reg[10]
21    }
22
23    pub fn set_return_value(&mut self, value: usize) {
24        // RISC-V syscall return value: a0 (x10)
25        self.reg[10] = value;
26    }
27
28    pub fn set_arg(&mut self, index: usize, value: usize) {
29        // RISC-V syscall arguments: a0-a7 (x10-x17)
30        if index < 8 {
31            self.reg[index + 10] = value;
32        }
33    }
34
35    pub fn get_arg(&self, index: usize) -> usize {
36        // RISC-V syscall arguments: a0-a7 (x10-x17)
37        if index < 8 { self.reg[index + 10] } else { 0 }
38    }
39
40    /// Get thread pointer (tp/x4) for TLS
41    pub fn get_tp(&self) -> usize {
42        self.reg[4]
43    }
44
45    /// Set thread pointer (tp/x4) for TLS
46    pub fn set_tp(&mut self, value: usize) {
47        self.reg[4] = value;
48    }
49}
kernel/arch/riscv64/registers.rs

kernel/arch/riscv64/
registers.rs
