Struct Plic 

pub struct Plic {
    base_addr: usize,
    max_interrupts: InterruptId,
    max_cpus: CpuId,
    s_mode_contexts: Option<Vec<usize>>,
}

RISC-V PLIC Implementation

Fields

base_addr: usize

Base address of the PLIC

max_interrupts: InterruptId

Maximum number of interrupts this PLIC supports

max_cpus: CpuId

Maximum number of CPUs (harts) this PLIC supports

s_mode_contexts: Option<Vec<usize>>

S-mode context ID for each CPU (hart). Index = CPU ID, Value = PLIC context ID for S-mode external interrupt. If None, use the default formula: (cpu_id * 2) + 1

Implementations

impl Plic

pub fn new( base_addr: usize, max_interrupts: InterruptId, max_cpus: CpuId, ) -> Self

Create a new PLIC instance

Arguments

• base_addr - Physical base address of the PLIC
• max_interrupts - Maximum interrupt ID supported (1-based)
• max_cpus - Maximum number of CPUs supported

pub fn with_contexts( base_addr: usize, max_interrupts: InterruptId, s_mode_context_ids: Vec<usize>, ) -> Self

Create a new PLIC instance with explicit S-mode context mapping

Arguments

• base_addr - Physical base address of the PLIC
• max_interrupts - Maximum interrupt ID supported (1-based)
• s_mode_context_ids - Vector mapping CPU ID -> PLIC context ID for S-mode

fn context_id_for_cpu(&self, cpu_id: CpuId) -> usize

Convert CPU ID to PLIC context ID for Supervisor mode. If explicit mapping exists, use it; otherwise Hart 0 S-Mode -> Context 1, etc.

fn priority_addr(&self, interrupt_id: InterruptId) -> usize

Get the address of a priority register for an interrupt

fn pending_addr(&self, interrupt_id: InterruptId) -> usize

Get the address of a pending register for an interrupt

fn enable_addr(&self, cpu_id: CpuId, interrupt_id: InterruptId) -> usize

Get the address of an enable register for a CPU and interrupt

fn threshold_addr(&self, cpu_id: CpuId) -> usize

Get the address of a threshold register for a CPU

fn claim_addr(&self, cpu_id: CpuId) -> usize

Get the address of a claim register for a CPU

fn validate_interrupt_id( &self, interrupt_id: InterruptId, ) -> InterruptResult<()>

Validate interrupt ID

fn validate_cpu_id(&self, cpu_id: CpuId) -> InterruptResult<()>

Validate CPU ID

fn mmio_write32_with_readback(addr: usize, value: u32) -> u32

MMIO write with readback verification

Trait Implementations

impl ExternalInterruptController for Plic

fn init(&mut self) -> InterruptResult<()>

Initialize the PLIC

fn enable_interrupt( &mut self, interrupt_id: InterruptId, cpu_id: CpuId, ) -> InterruptResult<()>

Enable a specific interrupt for a CPU

fn disable_interrupt( &mut self, interrupt_id: InterruptId, cpu_id: CpuId, ) -> InterruptResult<()>

Disable a specific interrupt for a CPU

fn set_priority( &mut self, interrupt_id: InterruptId, priority: Priority, ) -> InterruptResult<()>

Set priority for a specific interrupt

fn get_priority(&self, interrupt_id: InterruptId) -> InterruptResult<Priority>

Get priority for a specific interrupt

fn set_threshold( &mut self, cpu_id: CpuId, threshold: Priority, ) -> InterruptResult<()>

Set priority threshold for a CPU

fn get_threshold(&self, cpu_id: CpuId) -> InterruptResult<Priority>

Get priority threshold for a CPU

fn claim_interrupt( &mut self, cpu_id: CpuId, ) -> InterruptResult<Option<InterruptId>>

Claim an interrupt (acknowledge and get the interrupt ID)

fn complete_interrupt( &mut self, cpu_id: CpuId, interrupt_id: InterruptId, ) -> InterruptResult<()>

Complete an interrupt (signal that handling is finished)

fn is_pending(&self, interrupt_id: InterruptId) -> bool

Check if a specific interrupt is pending

fn max_interrupts(&self) -> InterruptId

Get the maximum number of interrupts supported

fn max_cpus(&self) -> CpuId

Get the number of CPUs supported

impl Send for Plic

impl Sync for Plic